PoP is an IC packaging technique that involves vertically stacking two or more electronic packages on one another. One recognized advantage of PoP is less board space. POP is a conventional packaging solution for applications that require more features in a minimum of space, such as digital cameras, PDA's, MP3 players, and mobile gaming devices. POP assemblies usually comprise two electronic packages, such as one or more memory devices in a first package mounted on top of a logic device in a second package.
In some arrangements the bottom or base package may employ die stacking, such as for example, to allow the combination of analog functionality or flash memory to the logic chip. The base package in such arrangements is generally a molded substrate comprising two or more stacked IC die having overmolding covering the IC die(s). In this arrangement, the portions of the base package lateral to the molded die(s) include exposed land pads (i.e. without molding). Since the IC die thickness is generally 75 to 100 μm, the overmold height for the PoP molded substrate is generally at least 150 μm.
As known in the art, as the pitch of the land pads decreases, the size of the solder balls (which are generally spherical) must also decrease to avoid the solder balls shorting together adjacent land pads. Accordingly, when bonding a fine pitched packaged IC on top of a molded substrate, the maximum solder ball size used to connect the packaged IC to the exposed land pads of the package substrate is limited by the pitch of the packaged IC to be mounted. A problem is thus presented when the maximum solder ball size becomes too short to reach the pads on the bottom package substrate located lateral to the molded IC die (or die stack).
Particularly when the bottom package has a large overmold height, such as at least 150 μm, and the packaged IC to be mounted has a fine-pitched land pads, such as memory die having ≦0.4 mm pitched (mmp) land pads, this problem has to be addressed. Known processes for addressing this problem include deep cavity substrates, through mold vias (TMVs), and molded core embedded packages (MCEPs). Cavity substrates are known to be expensive because of many bonded (e.g., glued) layers and multilayer metal, and are also known to have quality control difficulties. Difficulties for quality control of cavity substrates include challenges associated with deep via etching, via bottom cleaning, and alignment accuracy on layer lamination. TMV and MCEP are known to be relatively complex and are thus both relatively expensive assembly processes. Moreover, none of these processes can generally support PoP arrangements when the top packaged has fine-pitched land pads (e.g., 0.4 mmp or 0.5 mmp).